Logic Gates from Transistors

class: center, middle, inverse, title-slide

.title[
# Logic Gates from Transistors
]
.subtitle[
## Programmable Electronics — Unit 2
]
.date[
### Class 11
]

---

# Learning Targets

.lt-box[
- Explain how a transistor used as a switch becomes a logic gate: the output voltage answers a yes/no question about the inputs.
- Build NOT, NAND, and NOR on the breadboard from transistors, with pushbuttons for inputs and an LED for the output, and fill in each truth table by pressing buttons.
- Build AND and OR by adding an inverter, and explain why NAND and NOR are the "natural" gates.
- Combine gates you built into an XOR, and predict its truth table.
]

.eu-label[Essential Understanding:] A logic gate is nothing more than transistors used as switches, wired so the output is HIGH or LOW depending on the inputs. You already built a one-transistor switch for the nightlight. Wire a few together and you have a circuit that *decides* — the first step from "senses and reacts" toward "computes."

---

# Agenda

.agenda-box[
1. The six gates and their truth tables
2. Recap: the transistor as a switch
3. One transistor → the NOT gate
4. Inputs are buttons, outputs are LEDs
5. **Build:** NOT, then NAND, then NOR
6. AND and OR — the price of *not* inverting
7. **Build:** AND or OR, then combine into XOR
8. Homework
]

---
class: small-font

# The six gates

.pull-left.w36[
<img src="assets/schematics/logic-gate-symbols.svg" alt="Symbols for AND, OR, NOT on the top row and NAND, NOR, XOR on the bottom row" style="width:100%;max-height:250px;"/>
]
.pull-right.w60[
Each gate takes one or two inputs (0 or 1) and gives one output. The **truth table** is the whole definition — it lists the output for every input combination.

- **AND** — 1 only when *both* inputs are 1.
- **OR** — 1 when *either* input is 1.
- **XOR** — 1 when the inputs *differ*.
- **NAND / NOR** — AND / OR with the output flipped (the **bubble** on the symbol).
- **NOT** — one input, flipped: <b>0&nbsp;→&nbsp;1</b>, <b>1&nbsp;→&nbsp;0</b>.
]

---

# Recap: the transistor as a switch

- Class 9: a small current into the **base** lets a much larger current flow **collector → emitter**. Base current on → the transistor conducts (a closed switch). Base current off → it doesn't (an open switch).
- In the nightlight, the sensor's voltage drove the base and the transistor switched the LED.
- Today the thing driving the base is a **pushbutton** — and the thing we watch is whether the *output* went HIGH or LOW.
- A **logic gate** is just this switch, wired so the output voltage is a yes/no answer about the input voltages.

---

# One transistor → the NOT gate

.pull-left.w44[
<img src="assets/schematics/rtl-not.svg" alt="NOT gate: pushbutton and pull-down feeding a base resistor into an NPN transistor, collector pulled up to +6 V through R_C and also driving an output LED, emitter to ground" style="width:100%;max-height:350px;"/>
]
.pull-right.w52[
- **Input LOW** (button up): no base current, transistor **off**. `$R_C$` pulls the output up to near +6 V — **output HIGH**, LED on.
- **Input HIGH** (button down): base current flows, transistor **on**, collector clamped near 0 V — **output LOW**, LED off.
- The output is always the **opposite** of the input. That's a **NOT gate** (an inverter).

<table class="truth">
<tr><th>A</th><th class="dv"></th><th>out</th></tr>
<tr><td>0</td><td class="dv"></td><td>1</td></tr>
<tr><td>1</td><td class="dv"></td><td>0</td></tr>
</table>
]

---

# Inputs and outputs, physically

- **An input** = a pushbutton from +6 V to the input node, **plus** a resistor from that node to ground. Button pressed → node HIGH. Button released → the resistor holds it at a solid LOW. (Never leave it floating — the transistor can't tell what to do with an in-between voltage.)
- The input node feeds the base through `$R_B$`, which limits base current the same way the base resistor did in Class 9.
- **The output** = the transistor's collector. An LED + resistor from there to ground **shows** you the output: lit = HIGH = 1.
- Every gate today uses this same input and output wiring — only the transistors in the middle change.

---
class: small-font

# Build 1: NOT, NAND, NOR

.pull-left.w32[
<img src="assets/schematics/rtl-nand.svg" alt="NAND from two transistors stacked in series between the pulled-up output and ground" style="width:100%;max-height:250px;"/>
]
.pull-right.w66[
Breadboard, 6 V pack, **transistors** (you'll need up to 8 today — get extras from me), **2 pushbuttons**, LEDs, and resistors: **1 kΩ** (`$R_C$`), **10 kΩ** (`$R_B$`, one per input), **100 kΩ** (pull-down, one per input), **470 Ω** (LED).

1. **NOT** — build the one-transistor circuit from the previous slide. Press the button: does the LED do the opposite? Record the 2-row table.
2. **NOR** — *two transistors in parallel*: both collectors to the output, both emitters to ground, each base its own input. Either button pressed pulls the output LOW. Record the 4-row table — when is the output HIGH?
3. **NAND** — *two transistors in series* (shown at left): the output can only be pulled LOW when **both** transistors are on. Record the table — when is the output LOW?
]

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# AND and OR — the price of not inverting

.pull-left.w44[
<img src="assets/schematics/rtl-and-or.svg" alt="NAND followed by NOT equals AND; NOR followed by NOT equals OR" style="width:100%;max-height:230px;"/>
]
.pull-right.w52[
- NOT, NAND, NOR all came out **inverted** — that's what one stage of transistor switching does.
- To get a **non-inverted** AND, invert a NAND. To get OR, invert a NOR. **One extra transistor** each.
- So inversion is free; *not* inverting costs you. That's why real logic chips are built mostly from **NAND** and **NOR** — and why the "universal gate" idea in Class 16 is NAND.
]

---

# The AND gate — NAND + inverter

.center[
<img src="assets/schematics/rtl-and.svg" alt="AND gate: NAND stack Q1 over Q2 feeding an inverter Q3; output HIGH only when A and B are both HIGH" style="width:100%;max-height:330px;"/>
]

Q1 and Q2 are your NAND. Q3 is a NOT stage — same `$R_B$`, `$R_C$`, and transistor as the NOT gate. The NAND output feeds Q3's base; Q3's collector is the AND output.

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# The OR gate — NOR + inverter

.center[
<img src="assets/schematics/rtl-or.svg" alt="OR gate: NOR pair Q1 and Q2 in parallel feeding an inverter Q3; output HIGH when A or B is HIGH" style="width:100%;max-height:300px;"/>
]

Q1 and Q2 are your NOR. Q3 is the same NOT stage again. You're bolting an inverter onto the output of a gate you already built.

---
class: small-font

# Build 2: AND or OR, then XOR

.pull-left.w40[
<img src="assets/schematics/xor-from-gates.svg" alt="A and B feeding an OR gate and a NAND gate, both outputs feeding an AND gate, whose output is A XOR B" style="width:100%;max-height:240px;"/>
]
.pull-right.w58[
**AND or OR** — your group picks one, we'll compare. Take your NAND (or NOR) and feed its output into a **NOT** stage. Record the table, then trade results with a group that built the other one.

**XOR** *(stretch)* — "output HIGH when the inputs **differ**." Build it by combining gates:
`$$\text{XOR} = (A \text{ OR } B)\ \text{AND}\ (A \text{ NAND } B)$$`
Feed A and B to **both** an OR gate and a NAND gate, then feed *those two outputs* into an AND gate. Predict the 4-row table, then check it.
]

---
class: center, middle

# Homework

.hw-box[
- You built NAND from **2** transistors. Sketch a **3-input** NAND — how many transistors, and how are they wired?
- Which gates needed an **extra transistor** for the inversion, and why does that make NAND and NOR the ones real chips are built from?
- Your gate's "HIGH" output was probably **not** a clean 6 V — measure it, and **keep the page** — we come back to that number in Class 16, when the same gates arrive sealed inside a chip. Predict one thing you **gain** and one thing you **lose** by not being able to see the transistors.
]